1. Field
The present invention relates to memory accessing in information processing systems, and, more particularly, to improved memory access in multiple processor systems.
2. Description of the Related Art
Accelerated Graphics Port (AGP) is an interface specification that enables 3-D graphics to display quickly on ordinary personal computers. AGP is designed to convey 3-D images (for example, from Web sites or CD-ROMs) much more quickly and smoothly than is otherwise normally possible on any computer other than an expensive graphics workstation. It is especially useful in conjunction with gaming, three-dimensional (3D) video, and sophisticated scientific/engineering graphics programs.
An AGP graphics processor card typically includes its own video memory, but such memory is expensive, and is typically used to provide a frame buffer to draw the display. Because such memory may be insufficient to store all video data, the AGP interface uses a computer system's random access memory (RAM) to support functions such as texture mapping, z-buffering, and alpha blending typically performed for 3-D image display. Such access of system memory is similar to that used in unified memory architecture (UMA) graphics systems, which typically have no video memory on the graphics card. The AGP main memory use is dynamic, meaning that when not being used for accelerated graphics, main memory is restored for use by the operating system or by other applications.
NUMA (non-unified memory access) is a method of configuring a set of microprocessors in a multiprocessing system so that the microprocessors can share memory locally, improving performance and the ability of the system to be expanded. NUMA is commonly used in symmetric multiprocessing (SMP) systems. SMP and NUMA systems are typically used, for example, for applications in which it is advantageous to parcel out processing tasks to a number of processors that collectively work on a common database. Typically, all processors that are part of an SMP processor complex can access all resources of that complex, such as memory, or i/o devices. Software can run on any processor without regard to device accessibility. A typical SMP system would have one memory controller and that single memory controller manages all of the DRAM.
An exemplary NUMA architecture may include four microprocessors interconnected on a local bus (for example, a Peripheral Component Interconnect (PCI) bus or a HyperTransport protocol bus) to a shared memory (e.g., an “L3 cache”) on a single motherboard or card. This unit can be added to similar units to form a symmetric multiprocessing system in which a common SMP bus interconnects all of the clusters. Such a system can contain any number of microprocessors, often from 16 to 256 microprocessors, for example. To an application program running in an SMP system, all the individual processor memories look like a single memory.
In a NUMA SMP system, some devices such as an AGP graphics controller can use any memory within the system. If the AGP graphics controller uses memory addresses which correspond to a physical device located farther away from the AGP controller on the NUMA interconnect subsystem rather than closer to the AGP controller, greater latency of memory accesses may be introduced, thereby potentially detrimentally affecting the overall performance of the NUMA SMP system. Thus, a technique is needed to effectively and efficiently allocate memory accessible by devices in multiprocessor systems, for example, to reduce memory access latency.